Fibich-Christian-UASTW

Christian Fibich, MSc

Lecturer/Researcher

Contact

+43-1-3334077-8883christian.fibich@technikum-wien.at

CV

Publications

Characterization of Interconnect Fault Effects in SRAM-based FPGAs
  • Christian Fibich, Martin Horauer, Roman Obermaisser (2023)
  • Proceedings of the 26th International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS 2023), 3-5 May 2023, Tallinn, Estonia
Bitstream-Level Interconnect Fault Characterization for SRAM-based FPGAs
  • Christian Fibich, Martin Horauer, Roman Obermaisser (2023)
  • Proceedings of the 2023 Design, Automation & Test in Europe Conference & Exhibition (DATE 2023), pp. 1-2, 16-18 April 2023, Antwerp, Belgium, pp. 2
Device- and Temperature Dependency of Systematic Fault Injection Results in Artix-7 and iCE40 FPGAs
  • Christian Fibich, Martin Horauer, Roman Obermaisser (2021)
  • Proceedings of the 2021 Design, Automation & Test in Europe Conference & Exhibition (DATE), 1-5 February 2021, Grenoble, France
Evaluation of Open-Source Linear Algebra Libraries targeting ARM and RISC-V Architectures
  • Christian Fibich, Stefan Tauner, Peter Rössler, Martin Horauer (2020)
  • Proceedings of the 2020 15th Conference on Computer Science and Information Systems (FedCSIS), 6-9 September 2020, Sofia, Bulgaria
Evaluation of Open-Source Linear Algebra Libraries in Embedded Applications
  • Christian Fibich, Stefan Tauner, Peter Rössler, Martin Horauer, Markus Krapfenbauer, Martin Linauer, Martin Matschnig, Herbert Taucher (2019)
  • 8th Mediterranean Conference on Embedded Computing (MECO), co-sponsored by IEEE, June 10-14, 2019, Budva, Montenegro, pp. 6
Reliability-Enhanced High-Level Synthesis using Memory Profiling and Fault Injection
  • Christian Fibich, Martin Horauer, Roman Obermaisser (2019)
  • 2019 IEEE 28th International Symposium on Industrial Electronics (ISIE), Vancouver, BC, Canada, 2019
Preliminary Evaluation of High-level Synthesis Tools - Xilinx Vivado and PandA Bambu
  • Christian Fibich, Stefan Tauner, Peter Rössler, Martin Horauer, Martin Matschnig, Herbert Taucher (2018)
  • IEEE 13th International Symposium on Industrial Embedded Systems (SIES), Graz, 2018, pp. 4
HLShield: A Reliability Enhancement Framework for High-Level Synthesis
  • Christian Fibich, Martin Horauer, Roman Obermaisser (2017)
  • 12th IEEE International Symposium on Industrial Embedded Systems (SIES 2017)
A FPGA-based Demonstrator for Safety-Critical Applications
  • Christian Fibich, Peter Rössler, Stefan Tauner, Martin Matschnig, Herbert Taucher (2017)
  • IEEE Austria Austrochip 2017, Oct. 12, 2017, Linz, 6 pages
Vulnerability Analysis of Storage Elements in HLS-Generated Designs using High-Level Profiling
  • Christian Fibich, Martin Horauer, Roman Obermaisser (2017)
  • Proceedings of the 2nd International Conference on System Reliability and Safety (ICSRS2017), 20-22 December 2017, Milan, Italy, pp. 5
Logic Synthesis of Assertions for Saftey-critical Applications
  • Matthias Wenzl, Christian Fibich, Peter Rössler, Herbert Taucher, Martin Matschnig (2015)
  • Proceedings of the 2015 International Conference on Industrial Technology (ICIT), March 17-19, 2015
On Automated Generation of Checker Units from Hardware Assertion Languages
  • Christian Fibich, Matthias Wenzl, Peter Rössler (2014)
  • Proceedings of the Microelectronic Systems Symposium 2014 (MESS'14), May 8-9, Vienna, 2014